Searched refs:MUX_PLL4 (Results 1 – 2 of 2) sorted by relevance
| /optee_os/core/include/dt-bindings/clock/ |
| H A D | stm32mp13-clksrc.h | 88 #define MUX_PLL4 5 macro
155 #define CLK_PLL4_HSI CLKSRC(MUX_PLL4, 0)
156 #define CLK_PLL4_HSE CLKSRC(MUX_PLL4, 1)
157 #define CLK_PLL4_CSI CLKSRC(MUX_PLL4, 2)
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| /optee_os/core/drivers/clk/ |
| H A D | clk-stm32mp13.c | 461 MUXRDY_CFG(MUX_PLL4, RCC_RCK4SELR, 0, 2, GATE_PLL4SRCRDY),
919 CLK_PLL_CFG(PLL4_ID, PLL_800, GATE_PLL4, MUX_PLL4, RCC_PLL4CR),
2105 0, RCC_PLL4CR, GATE_PLL4, MUX_PLL4);
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