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Searched refs:MUX_MPU (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/include/dt-bindings/clock/
H A Dstm32mp13-clksrc.h83 #define MUX_MPU 0 macro
134 #define CLK_MPU_HSI CLKSRC(MUX_MPU, 0)
135 #define CLK_MPU_HSE CLKSRC(MUX_MPU, 1)
136 #define CLK_MPU_PLL1P CLKSRC(MUX_MPU, 2)
137 #define CLK_MPU_PLL1P_DIV CLKSRC(MUX_MPU, 3)
/optee_os/core/drivers/clk/
H A Dclk-stm32mp13.c456 MUXRDY_CFG(MUX_MPU, RCC_MPCKSELR, 0, 2, GATE_MPUSRCRDY),
1302 int mux_system[] = { MUX_MPU, MUX_AXI, MUX_MLAHB, -1 }; in clk_stm32_pll_init()
1844 size_t sel = stm32_mux_get_parent(MUX_MPU); in clk_stm32_pll1_set_rate()
1862 if (stm32_mux_set_parent(MUX_MPU, 0)) in clk_stm32_pll1_set_rate()
1878 if (stm32_mux_set_parent(MUX_MPU, sel)) in clk_stm32_pll1_set_rate()
2138 .mux_id = MUX_MPU,