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Searched refs:MUX_LPTIM45 (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/include/dt-bindings/clock/
H A Dstm32mp13-clksrc.h107 #define MUX_LPTIM45 24 macro
286 #define CLK_LPTIM45_PCLK3 CLKSRC(MUX_LPTIM45, 0)
287 #define CLK_LPTIM45_PLL4P CLKSRC(MUX_LPTIM45, 1)
288 #define CLK_LPTIM45_PLL3Q CLKSRC(MUX_LPTIM45, 2)
289 #define CLK_LPTIM45_LSE CLKSRC(MUX_LPTIM45, 3)
290 #define CLK_LPTIM45_LSI CLKSRC(MUX_LPTIM45, 4)
291 #define CLK_LPTIM45_CKPER CLKSRC(MUX_LPTIM45, 5)
/optee_os/core/drivers/clk/
H A Dclk-stm32mp13.c477 MUX_CFG(MUX_LPTIM45, RCC_LPTIM45CKSELR, 0, 3),
2411 0, GATE_LPTIM4, MUX_LPTIM45);
2416 0, GATE_LPTIM5, MUX_LPTIM45);