Searched refs:MUX_DSIBLANE (Results 1 – 5 of 5) sorted by relevance
| /optee_os/core/include/dt-bindings/clock/ |
| H A D | stm32mp25-clksrc.h | 108 #define MUX_DSIBLANE 17 macro
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| /optee_os/core/arch/arm/dts/ |
| H A D | stm32mp235f-dk-ca35tdcid-rcc.dtsi | 101 MUX_CFG(MUX_DSIBLANE, MUX_DSIBLANE_DSIPHY)
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| H A D | stm32mp257f-dk-ca35tdcid-rcc.dtsi | 108 MUX_CFG(MUX_DSIBLANE, MUX_DSIBLANE_DSIPHY)
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| H A D | stm32mp257f-ev1-ca35tdcid-rcc.dtsi | 108 MUX_CFG(MUX_DSIBLANE, MUX_DSIBLANE_DSIPHY)
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| /optee_os/core/drivers/clk/ |
| H A D | clk-stm32mp25.c | 628 _MUX_CFG(MUX_DSIBLANE, RCC_DSICFGR, 12, 1, MUX_NO_RDY),
3048 0, GATE_DSI, NO_DIV, MUX_DSIBLANE);
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