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Searched refs:DIV_PLL4DIVR (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/include/dt-bindings/clock/
H A Dstm32mp13-clksrc.h48 #define DIV_PLL4DIVR 9 macro
/optee_os/core/drivers/clk/
H A Dclk-stm32mp13.c570 DIV_CFG(DIV_PLL4DIVR, RCC_PLL4CFGR2, 16, 7, 0, NULL),
2132 GATE_PLL4_DIVR, DIV_PLL4DIVR, NO_MUX);