Home
last modified time | relevance | path

Searched refs:DIV_PLL4DIVP (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/include/dt-bindings/clock/
H A Dstm32mp13-clksrc.h46 #define DIV_PLL4DIVP 7 macro
/optee_os/core/drivers/clk/
H A Dclk-stm32mp13.c568 DIV_CFG(DIV_PLL4DIVP, RCC_PLL4CFGR2, 0, 7, 0, NULL),
2126 GATE_PLL4_DIVP, DIV_PLL4DIVP, NO_MUX);