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Searched refs:DIV_PLL3DIVQ (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/include/dt-bindings/clock/
H A Dstm32mp13-clksrc.h44 #define DIV_PLL3DIVQ 5 macro
/optee_os/core/drivers/clk/
H A Dclk-stm32mp13.c566 DIV_CFG(DIV_PLL3DIVQ, RCC_PLL3CFGR2, 8, 7, 0, NULL),
2120 GATE_PLL3_DIVQ, DIV_PLL3DIVQ, NO_MUX);