Home
last modified time | relevance | path

Searched refs:DIV_PLL3DIVP (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/include/dt-bindings/clock/
H A Dstm32mp13-clksrc.h43 #define DIV_PLL3DIVP 4 macro
/optee_os/core/drivers/clk/
H A Dclk-stm32mp13.c565 DIV_CFG(DIV_PLL3DIVP, RCC_PLL3CFGR2, 0, 7, 0, NULL),
2117 GATE_PLL3_DIVP, DIV_PLL3DIVP, NO_MUX);