Searched refs:CONTROL_REG (Results 1 – 1 of 1) sorted by relevance
19 #define CONTROL_REG 0x00000000 macro59 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_READ); in xiphera_trng_read32()60 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_ENABLE); in xiphera_trng_read32()119 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_RESET); in xiphera_trng_probe()144 io_write32(xiphera_trng_base + CONTROL_REG, in xiphera_trng_probe()146 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_ENABLE); in xiphera_trng_probe()147 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_ZEROIZE); in xiphera_trng_probe()165 io_write32(xiphera_trng_base + CONTROL_REG, HOST_TO_TRNG_ACK_ZEROIZE); in xiphera_trng_probe()