| #
bce2f88a |
| 19-Nov-2023 |
Vincent Mailhol <mailhol.vincent@wanadoo.fr> |
tree-wide: remove useless newline character in *MSG() messages
The *MSG() macros take care of printing a newline. Adding a newline character ('\n') is useless. Remove it.
Signed-off-by: Vincent Mai
tree-wide: remove useless newline character in *MSG() messages
The *MSG() macros take care of printing a newline. Adding a newline character ('\n') is useless. Remove it.
Signed-off-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
f354a5d8 |
| 05-Apr-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
core: replace _fdt_ prefix with fdt_ for device tree API
As per upstream discussion, there is no reason to keep _fdt_ prefix. Replaces it with fdt_ for all occurrences.
Signed-off-by: Gatien Cheval
core: replace _fdt_ prefix with fdt_ for device tree API
As per upstream discussion, there is no reason to keep _fdt_ prefix. Replaces it with fdt_ for all occurrences.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
a5d5bbc8 |
| 25-Mar-2022 |
Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> |
core: dt: Make it possible to alter device mapping
In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device
core: dt: Make it possible to alter device mapping
In case where IP core device is TrustZone aware and is used by both REE and TEE dt_map_dev() would normally cause non-secure mapping for the device.
When selected registers in IP core are only accessible by TrustZone device needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access be made with AWPROT[1] and ARPROT[1] bits configured properly.
This adds new argument for dt_map_dev() to enable forcing mapping to be secure or non-secure.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
825dff97 |
| 29-Jul-2022 |
Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> |
drivers: xiphera_trng: Allow interrupts while waiting for random
If for some reason getting new random values take a bit longer toggle interrupt masks on/off while waiting.
This allows pending inte
drivers: xiphera_trng: Allow interrupts while waiting for random
If for some reason getting new random values take a bit longer toggle interrupt masks on/off while waiting.
This allows pending interrupts to be served faster in REE side as getting new random might not be that important. At the same time it gives more time for random number generation to complete and not just performing spinning and waiting.
It was originally recommended by TRNG vendor not to cache previous partial results in memory. TRNG itself is rather fast so there should be always fresh bytes available for consumption. Thus to simplify the code remove the FIFO construct.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
bc842791 |
| 05-Jul-2022 |
Andrew Davis <afd@ti.com> |
drivers: xiphera_trng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so implement just hw_get_random_bytes().
drivers: xiphera_trng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so implement just hw_get_random_bytes().
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
74c676be |
| 30-Jan-2022 |
Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> |
drivers: xiphera_trng: Add support for XIP8001B TRNG
Adds support for Xiphera's XIP8001B true random number generator.
XIP8001B is a FPGA IP core that can be synthesized in FPGA devices to provide
drivers: xiphera_trng: Add support for XIP8001B TRNG
Adds support for Xiphera's XIP8001B true random number generator.
XIP8001B is a FPGA IP core that can be synthesized in FPGA devices to provide TRNG source for device where it is missing like Xilinx Zynq-7000 and Xilinx Zynq MPSoC.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Co-developed-by: Atte Tommiska <atte.tommiska@xiphera.com> Signed-off-by: Atte Tommiska <atte.tommiska@xiphera.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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