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Searched refs:CBCR_BRANCH_ENABLE_BIT (Results 1 – 3 of 3) sorted by relevance

/optee_os/core/pta/qcom/pas/
H A Ddsp.c14 #define CBCR_BRANCH_ENABLE_BIT BIT(0) macro
30 io_write32(base + regs->xo_cbcr, CBCR_BRANCH_ENABLE_BIT); in dsp_fw_start()
31 io_write32(base + regs->sleep_cbcr, CBCR_BRANCH_ENABLE_BIT); in dsp_fw_start()
35 CBCR_BRANCH_ENABLE_BIT | CBCR_HW_CTL_ENABLE_BIT); in dsp_fw_start()
37 io_write32(base + regs->core_cbcr, CBCR_BRANCH_ENABLE_BIT); in dsp_fw_start()
/optee_os/core/drivers/clk/qcom/
H A Dclock-qcom.c14 #define CBCR_BRANCH_ENABLE_BIT BIT(0) macro
27 io_setbits32(cbcr, CBCR_BRANCH_ENABLE_BIT); in qcom_clock_enable_cbc()
H A Dclock-qcom-pas.c21 #define CBCR_BRANCH_ENABLE_BIT BIT(0) macro
63 io_clrbits32(cc_base + TURING_Q6SS_Q6_AXIM_CLK, CBCR_BRANCH_ENABLE_BIT); in compute_cc_enable()