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Searched refs:CACHELINE_LEN (Results 1 – 9 of 9) sorted by relevance

/optee_os/core/drivers/
H A Dversal_mbox.c152 CACHELINE_LEN)) { in versal_mbox_write_req()
158 if (!IS_ALIGNED(cmd->ibuf[i].mem.alloc_len, CACHELINE_LEN)) { in versal_mbox_write_req()
202 CACHELINE_LEN)) { in versal_mbox_read_rsp()
208 if (!IS_ALIGNED(cmd->ibuf[i].mem.alloc_len, CACHELINE_LEN)) { in versal_mbox_read_rsp()
270 mem->buf = memalign(CACHELINE_LEN, ROUNDUP(len, CACHELINE_LEN)); in versal_mbox_alloc()
274 memset(mem->buf, 0, ROUNDUP(len, CACHELINE_LEN)); in versal_mbox_alloc()
279 mem->alloc_len = ROUNDUP(len, CACHELINE_LEN); in versal_mbox_alloc()
H A Dversal_nvm.c24 #define __aligned_efuse __aligned(CACHELINE_LEN)
H A Dversal_net_nvm.c26 #define __aligned_efuse __aligned(CACHELINE_LEN)
/optee_os/core/arch/arm/plat-versal2/
H A Dplatform_config.h12 #define CACHELINE_LEN 64 macro
13 #define STACK_ALIGNMENT CACHELINE_LEN
/optee_os/core/include/drivers/
H A Dzynqmp_pm.h32 #define ZYNQMP_EFUSE_MEM(_id) (ROUNDUP(ZYNQMP_EFUSE_LEN(_id), CACHELINE_LEN))
35 #define __aligned_efuse __aligned(CACHELINE_LEN)
H A Dversal_puf.h79 #define __aligned_puf __aligned(CACHELINE_LEN)
/optee_os/core/arch/arm/plat-zynqmp/
H A Dplatform_config.h35 #define CACHELINE_LEN 64 macro
36 #define STACK_ALIGNMENT CACHELINE_LEN
/optee_os/core/arch/arm/plat-versal/
H A Dplatform_config.h12 #define CACHELINE_LEN 64 macro
13 #define STACK_ALIGNMENT CACHELINE_LEN
/optee_os/core/pta/versal/
H A Dloader.c34 if (ROUNDUP_OVERFLOW(params[0].memref.size, CACHELINE_LEN, &bufsize)) in pta_versal_loader_subsys()
37 buf = memalign(CACHELINE_LEN, bufsize); in pta_versal_loader_subsys()