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Searched refs:sys_pll_psc (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-stm32/stm32f4/
H A Dclock.c116 struct pll_psc sys_pll_psc = { variable
127 struct pll_psc sys_pll_psc = { variable
163 sys_pll_psc.ahb_psc << RCC_CFGR_HPRE_SHIFT) in configure_clocks()
164 | (sys_pll_psc.apb1_psc << RCC_CFGR_PPRE1_SHIFT) in configure_clocks()
165 | (sys_pll_psc.apb2_psc << RCC_CFGR_PPRE2_SHIFT))); in configure_clocks()
167 writel(sys_pll_psc.pll_m in configure_clocks()
168 | (sys_pll_psc.pll_n << RCC_PLLCFGR_PLLN_SHIFT) in configure_clocks()
169 | (((sys_pll_psc.pll_p >> 1) - 1) << RCC_PLLCFGR_PLLP_SHIFT) in configure_clocks()
170 | (sys_pll_psc.pll_q << RCC_PLLCFGR_PLLQ_SHIFT), in configure_clocks()
/OK3568_Linux_fs/u-boot/drivers/clk/
H A Dclk_stm32f7.c98 struct pll_psc sys_pll_psc = { variable
133 sys_pll_psc.ahb_psc << RCC_CFGR_HPRE_SHIFT) in configure_clocks()
134 | (sys_pll_psc.apb1_psc << RCC_CFGR_PPRE1_SHIFT) in configure_clocks()
135 | (sys_pll_psc.apb2_psc << RCC_CFGR_PPRE2_SHIFT))); in configure_clocks()
140 pllcfgr |= sys_pll_psc.pll_m << RCC_PLLCFGR_PLLM_SHIFT; in configure_clocks()
141 pllcfgr |= sys_pll_psc.pll_n << RCC_PLLCFGR_PLLN_SHIFT; in configure_clocks()
142 pllcfgr |= ((sys_pll_psc.pll_p >> 1) - 1) << RCC_PLLCFGR_PLLP_SHIFT; in configure_clocks()
143 pllcfgr |= sys_pll_psc.pll_q << RCC_PLLCFGR_PLLQ_SHIFT; in configure_clocks()