Searched refs:spll_mdiv (Results 1 – 2 of 2) sorted by relevance
75 unsigned spll_mdiv; member
179 .spll_mdiv = 0xc8,901 val = set_pll(mem->spll_mdiv, mem->spll_pdiv, mem->spll_sdiv); in exynos5420_system_clock_init()