Home
last modified time | relevance | path

Searched refs:sli_max_num_m1 (Results 1 – 15 of 15) sorted by relevance

/OK3568_Linux_fs/external/mpp/mpp/common/
H A Dh265e_syntax_new.h183 RK_U16 sli_max_num_m1; member
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu541.c1174 regs->reg087.sli_max_num_m1 = 0; in setup_vepu541_split()
1185 regs->reg087.sli_max_num_m1 = 500; in setup_vepu541_split()
1196 regs->reg087.sli_max_num_m1 = 500; in setup_vepu541_split()
1222 regs->reg087.sli_max_num_m1 = 500; in setup_vepu540_force_slice_split()
H A Dhal_h264e_vepu540c.c1176 regs->reg_base.sli_splt.sli_max_num_m1 = 0; in setup_vepu540c_split()
1187 regs->reg_base.sli_splt.sli_max_num_m1 = 500; in setup_vepu540c_split()
1198 regs->reg_base.sli_splt.sli_max_num_m1 = 500; in setup_vepu540c_split()
H A Dhal_h264e_vepu541_reg.h1357 RK_U32 sli_max_num_m1 : 10; member
H A Dhal_h264e_vepu540c_reg.h512 RK_U32 sli_max_num_m1 : 15; member
H A Dhal_h264e_vepu580.c1736 regs->reg_base.sli_splt.sli_max_num_m1 = 0; in setup_vepu580_split()
1747 regs->reg_base.sli_splt.sli_max_num_m1 = 500; in setup_vepu580_split()
1763 regs->reg_base.sli_splt.sli_max_num_m1 = 500; in setup_vepu580_split()
H A Dhal_h264e_vepu580_reg.h479 RK_U32 sli_max_num_m1 : 15; member
/OK3568_Linux_fs/external/mpp/mpp/codec/enc/h265/
H A Dh265e_syntax.c146 sp->sli_max_num_m1 = 50; in fill_slice_parameters()
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/jpege/
H A Dhal_jpege_vepu540c_reg.h593 RK_U32 sli_max_num_m1 : 15; member
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu541_reg.h561 RK_U32 sli_max_num_m1 : 10; member
H A Dhal_h265e_vepu540c_reg.h600 RK_U32 sli_max_num_m1 : 15; member
H A Dhal_h265e_vepu541.c1509 regs->sli_spl.sli_max_num_m1 = 0; in setup_vepu541_split()
1520 regs->sli_spl.sli_max_num_m1 = 500; in setup_vepu541_split()
1531 regs->sli_spl.sli_max_num_m1 = 500; in setup_vepu541_split()
H A Dhal_h265e_vepu540c.c1230 reg_base->reg0216_sli_splt.sli_max_num_m1 = syn->sp.sli_max_num_m1; in hal_h265e_v540c_gen_regs()
H A Dhal_h265e_vepu580.c2462 regs->reg_base.reg0216_sli_splt.sli_max_num_m1 = 0; in setup_vepu580_split()
2473 regs->reg_base.reg0216_sli_splt.sli_max_num_m1 = 500; in setup_vepu580_split()
2493 regs->reg_base.reg0216_sli_splt.sli_max_num_m1 = 500; in setup_vepu580_split()
H A Dhal_h265e_vepu580_reg.h472 RK_U32 sli_max_num_m1 : 15; member