Searched refs:rmcr (Results 1 – 5 of 5) sorted by relevance
305 writel(0x00400302, &mctl_com->rmcr[0]); in mctl_port_cfg()306 writel(0x01000307, &mctl_com->rmcr[1]); in mctl_port_cfg()307 writel(0x00400302, &mctl_com->rmcr[2]); in mctl_port_cfg()308 writel(0x01000307, &mctl_com->rmcr[3]); in mctl_port_cfg()309 writel(0x01000307, &mctl_com->rmcr[4]); in mctl_port_cfg()310 writel(0x01000303, &mctl_com->rmcr[6]); in mctl_port_cfg()
304 writel(2, &mctl_com->rmcr); /* controller clock is PLL6/4 */ in mctl_sys_init()
28 u32 rmcr; /* 0x34 Refresh Mode Control Register */ member
20 u32 rmcr; /* 0x10 */ member
22 u32 rmcr[8]; /* 0x10 */ member