Searched refs:pllx_base (Results 1 – 3 of 3) sorted by relevance
32 union pllx_base_reg pllx_base; in wb_start() local145 pllx_base.word = 0; in wb_start()169 pllx_base.divn = scratch3.pllx_base_divn; in wb_start()173 pllx_base.divp = scratch3.pllx_base_divp; in wb_start()176 pllx_base.bypass = 1; in wb_start()189 writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in wb_start()191 pllx_base.enable = 1; in wb_start()192 writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in wb_start()193 pllx_base.bypass = 0; in wb_start()194 writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in wb_start()
122 u32 pllx_base; member948 tegra20_cpu_clk_sctx.pllx_base = in tegra20_cpu_clock_suspend()977 base != tegra20_cpu_clk_sctx.pllx_base) { in tegra20_cpu_clock_resume()981 writel(tegra20_cpu_clk_sctx.pllx_base, in tegra20_cpu_clock_resume()985 if (tegra20_cpu_clk_sctx.pllx_base & (1 << 30)) in tegra20_cpu_clock_resume()
140 u32 pllx_base; member1151 tegra30_cpu_clk_sctx.pllx_base = in tegra30_cpu_clock_suspend()1180 base != tegra30_cpu_clk_sctx.pllx_base) { in tegra30_cpu_clock_resume()1184 writel(tegra30_cpu_clk_sctx.pllx_base, in tegra30_cpu_clock_resume()1188 if (tegra30_cpu_clk_sctx.pllx_base & (1 << 30)) in tegra30_cpu_clock_resume()