Searched refs:pll_stable_status (Results 1 – 4 of 4) sorted by relevance
29 while (!(readl(&ccm->pll_stable_status) & (1 << 8))) {} in clock_init_safe()41 while (!(readl(&ccm->pll_stable_status) & (1 << 6))) {} in clock_init_safe()92 while (!(readl(&ccm->pll_stable_status) & 0x01)) {} in clock_set_pll1()97 while (!(readl(&ccm->pll_stable_status) & 0x02)) {} in clock_set_pll1()
143 do { } while (!(readl(&ccm->pll_stable_status) & PLL_DDR_STATUS)); in clock_set_pll6()
41 u32 pll_stable_status; /* 0x9c */ member
93 u32 pll_stable_status; /* 0x20c PLL stable status register */ member