Searched refs:pll_div_2 (Results 1 – 1 of 1) sorted by relevance
190 struct clk_hw *pll_div_2; member237 if (cpuclk->pll_div_2 && req->rate < DIV_2_THRESHOLD) { in clk_cpu_8996_mux_determine_rate()241 parent = cpuclk->pll_div_2; in clk_cpu_8996_mux_determine_rate()293 .pll_div_2 = &pwrcl_smux.clkr.hw,315 .pll_div_2 = &perfcl_smux.clkr.hw,