Searched refs:pll_dbg0 (Results 1 – 2 of 2) sorted by relevance
180 u32 pll_dbg0; /* 0x20c */ member
222 writel(SUNXI_HDMI_PLL_DBG0_PLL3, &hdmi->pll_dbg0); in sunxi_hdmi_edid_get_mode()875 writel(SUNXI_HDMI_PLL_DBG0_PLL3, &hdmi->pll_dbg0);