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Searched refs:pll_con (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-pll.c109 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll2126_recalc_rate() local
112 pll_con = readl_relaxed(pll->con_reg); in samsung_pll2126_recalc_rate()
113 mdiv = (pll_con >> PLL2126_MDIV_SHIFT) & PLL2126_MDIV_MASK; in samsung_pll2126_recalc_rate()
114 pdiv = (pll_con >> PLL2126_PDIV_SHIFT) & PLL2126_PDIV_MASK; in samsung_pll2126_recalc_rate()
115 sdiv = (pll_con >> PLL2126_SDIV_SHIFT) & PLL2126_SDIV_MASK; in samsung_pll2126_recalc_rate()
142 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll3000_recalc_rate() local
145 pll_con = readl_relaxed(pll->con_reg); in samsung_pll3000_recalc_rate()
146 mdiv = (pll_con >> PLL3000_MDIV_SHIFT) & PLL3000_MDIV_MASK; in samsung_pll3000_recalc_rate()
147 pdiv = (pll_con >> PLL3000_PDIV_SHIFT) & PLL3000_PDIV_MASK; in samsung_pll3000_recalc_rate()
148 sdiv = (pll_con >> PLL3000_SDIV_SHIFT) & PLL3000_SDIV_MASK; in samsung_pll3000_recalc_rate()
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/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3399.c342 static uint32_t rkclk_pll_get_rate(u32 *pll_con) in rkclk_pll_get_rate() argument
347 con = readl(&pll_con[3]); in rkclk_pll_get_rate()
353 con = readl(&pll_con[0]); in rkclk_pll_get_rate()
355 con = readl(&pll_con[1]); in rkclk_pll_get_rate()
366 static void rkclk_set_pll(u32 *pll_con, const struct pll_div *div) in rkclk_set_pll() argument
374 pll_con, div->fbdiv, div->refdiv, div->postdiv1, in rkclk_set_pll()
384 rk_clrsetreg(&pll_con[3], PLL_MODE_MASK, in rkclk_set_pll()
388 rk_clrsetreg(&pll_con[3], PLL_DSMPD_MASK, in rkclk_set_pll()
391 rk_clrsetreg(&pll_con[0], PLL_FBDIV_MASK, in rkclk_set_pll()
393 rk_clrsetreg(&pll_con[1], in rkclk_set_pll()
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