Searched refs:performance_level_count (Results 1 – 12 of 12) sorted by relevance
808 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()825 ps->performance_levels[ps->performance_level_count - 1].mclk; in ni_apply_state_adjust_rules()827 ps->performance_levels[ps->performance_level_count - 1].vddci; in ni_apply_state_adjust_rules()834 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()845 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()851 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()856 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()864 for (i = 1; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()869 for (i = 0; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()873 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()[all …]
2291 if (state->performance_level_count == 0) in si_populate_power_containment_values()2294 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2305 for (i = 1; i < state->performance_level_count; i++) { in si_populate_power_containment_values()2373 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()2376 if (smc_state->levelCount != state->performance_level_count) in si_populate_sq_ramping_values()2397 for (i = 0; i < state->performance_level_count; i++) { in si_populate_sq_ramping_values()3014 for (i = ps->performance_level_count - 2; i >= 0; i--) { in si_apply_state_adjust_rules()3019 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3039 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3065 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in si_apply_state_adjust_rules()[all …]
173 u16 performance_level_count; member
47 u16 performance_level_count; member
815 for (i = 0; i < ps->performance_level_count; i++) { in ci_apply_state_adjust_rules()826 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in ci_apply_state_adjust_rules()3741 if (state->performance_level_count < 1) in ci_trim_dpm_states()3744 if (state->performance_level_count == 1) in ci_trim_dpm_states()3846 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_find_dpm_states_clocks_in_dpm_table()3848 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_find_dpm_states_clocks_in_dpm_table()3887 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()3888 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()4789 for (i = 0; i < state->performance_level_count; i++) { in ci_get_maximum_link_speed()5467 ps->performance_level_count = index + 1; in ci_parse_pplib_clock_info()[all …]
2387 if (state->performance_level_count == 0) in si_populate_power_containment_values()2390 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2401 for (i = 1; i < state->performance_level_count; i++) { in si_populate_power_containment_values()2468 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()2471 if (smc_state->levelCount != state->performance_level_count) in si_populate_sq_ramping_values()2492 for (i = 0; i < state->performance_level_count; i++) { in si_populate_sq_ramping_values()3163 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >= in ni_set_uvd_clock_before_set_eng_clock()3164 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_before_set_eng_clock()3181 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk < in ni_set_uvd_clock_after_set_eng_clock()3182 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_after_set_eng_clock()[all …]
615 u16 performance_level_count; member
3004 PP_ASSERT_WITH_CODE(smu7_ps->performance_level_count == 2, in smu7_apply_state_adjust_rules()3014 for (i = 0; i < smu7_ps->performance_level_count; i++) { in smu7_apply_state_adjust_rules()3067 [smu7_ps->performance_level_count - 1].memory_clock; in smu7_apply_state_adjust_rules()3101 for (i = 0; i < smu7_ps->performance_level_count; i++) { in smu7_apply_state_adjust_rules()3131 [smu7_ps->performance_level_count-1].memory_clock; in smu7_dpm_get_mclk()3153 [smu7_ps->performance_level_count-1].engine_clock; in smu7_dpm_get_sclk()3267 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()3270 …(smu7_power_state->performance_level_count < smum_get_mac_definition(hwmgr, SMU_MAX_LEVELS_GRAPHIC… in smu7_get_pp_table_entry_callback_func_v1()3275 (smu7_power_state->performance_level_count <= in smu7_get_pp_table_entry_callback_func_v1()3295 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()[all …]
3146 [vega10_power_state->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3149 (vega10_power_state->performance_level_count < in vega10_get_pp_table_entry_callback_func()3155 (vega10_power_state->performance_level_count <= in vega10_get_pp_table_entry_callback_func()3170 [vega10_power_state->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3257 if (vega10_ps->performance_level_count != 2) in vega10_apply_state_adjust_rules()3266 for (i = 0; i < vega10_ps->performance_level_count; i++) { in vega10_apply_state_adjust_rules()3374 for (i = 0; i < vega10_ps->performance_level_count; i++) { in vega10_apply_state_adjust_rules()3392 [vega10_ps->performance_level_count - 1].gfx_clock; in vega10_find_dpm_states_clocks_in_dpm_table()3395 [vega10_ps->performance_level_count - 1].mem_clock; in vega10_find_dpm_states_clocks_in_dpm_table()3514 PP_ASSERT_WITH_CODE((vega10_ps->performance_level_count >= 1), in vega10_trim_dpm_states()[all …]
82 uint16_t performance_level_count; member
109 uint16_t performance_level_count; member
126 uint16_t performance_level_count; member