| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v6_0.c | 3007 …_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v6_0_read_wave_data() argument 3010 dst[(*no_fields)++] = 0; in gfx_v6_0_read_wave_data() 3011 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v6_0_read_wave_data() 3012 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v6_0_read_wave_data() 3013 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v6_0_read_wave_data() 3014 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v6_0_read_wave_data() 3015 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v6_0_read_wave_data() 3016 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v6_0_read_wave_data() 3017 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v6_0_read_wave_data() 3018 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); in gfx_v6_0_read_wave_data() [all …]
|
| H A D | gfx_v7_0.c | 4174 …_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v7_0_read_wave_data() argument 4177 dst[(*no_fields)++] = 0; in gfx_v7_0_read_wave_data() 4178 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v7_0_read_wave_data() 4179 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v7_0_read_wave_data() 4180 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v7_0_read_wave_data() 4181 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v7_0_read_wave_data() 4182 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v7_0_read_wave_data() 4183 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v7_0_read_wave_data() 4184 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v7_0_read_wave_data() 4185 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); in gfx_v7_0_read_wave_data() [all …]
|
| H A D | gfx_v8_0.c | 5253 …_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v8_0_read_wave_data() argument 5256 dst[(*no_fields)++] = 0; in gfx_v8_0_read_wave_data() 5257 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v8_0_read_wave_data() 5258 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v8_0_read_wave_data() 5259 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v8_0_read_wave_data() 5260 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v8_0_read_wave_data() 5261 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v8_0_read_wave_data() 5262 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v8_0_read_wave_data() 5263 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v8_0_read_wave_data() 5264 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); in gfx_v8_0_read_wave_data() [all …]
|
| H A D | gfx_v9_0.c | 2038 …_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v9_0_read_wave_data() argument 2041 dst[(*no_fields)++] = 1; in gfx_v9_0_read_wave_data() 2042 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_0_read_wave_data() 2043 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_0_read_wave_data() 2044 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_0_read_wave_data() 2045 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_0_read_wave_data() 2046 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v9_0_read_wave_data() 2047 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v9_0_read_wave_data() 2048 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v9_0_read_wave_data() 2049 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW1); in gfx_v9_0_read_wave_data() [all …]
|
| H A D | amdgpu_gfx.h | 207 uint32_t wave, uint32_t *dst, int *no_fields);
|
| H A D | gfx_v10_0.c | 4164 …_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v10_0_read_wave_data() argument 4172 dst[(*no_fields)++] = 2; in gfx_v10_0_read_wave_data() 4173 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); in gfx_v10_0_read_wave_data() 4174 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); in gfx_v10_0_read_wave_data() 4175 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v10_0_read_wave_data() 4176 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); in gfx_v10_0_read_wave_data() 4177 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI); in gfx_v10_0_read_wave_data() 4178 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID1); in gfx_v10_0_read_wave_data() 4179 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID2); in gfx_v10_0_read_wave_data() 4180 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_INST_DW0); in gfx_v10_0_read_wave_data() [all …]
|