Searched refs:nb_desc (Results 1 – 2 of 2) sorted by relevance
85 int nb_desc; /* Number of hw. descriptors */ member520 sw_desc->hw_desc[sw_desc->nb_desc - 1]; in set_updater_desc()521 dma_addr_t dma = sw_desc->hw_desc[sw_desc->nb_desc - 2]->ddadr; in set_updater_desc()531 sw_desc->hw_desc[sw_desc->nb_desc - 2]->ddadr = sw_desc->first; in set_updater_desc()538 sw_desc->hw_desc[sw_desc->nb_desc - 1]; in is_desc_completed()551 desc1->hw_desc[desc1->nb_desc - 1]->ddadr = dma_to_chain; in pxad_desc_chain()726 BUG_ON(sw_desc->nb_desc == 0); in pxad_free_desc()727 for (i = sw_desc->nb_desc - 1; i >= 0; i--) { in pxad_free_desc()735 sw_desc->nb_desc = 0; in pxad_free_desc()767 sw_desc->nb_desc++; in pxad_alloc_desc()[all …]
1504 uint16_t nb_desc, in eth_igb_tx_queue_setup() argument1524 if (nb_desc % IGB_TXD_ALIGN != 0 || in eth_igb_tx_queue_setup()1525 (nb_desc > E1000_MAX_RING_DESC) || in eth_igb_tx_queue_setup()1526 (nb_desc < E1000_MIN_RING_DESC)) { in eth_igb_tx_queue_setup()1571 txq->nb_tx_desc = nb_desc; in eth_igb_tx_queue_setup()1598 sizeof(struct igb_tx_entry) * nb_desc, in eth_igb_tx_queue_setup()1713 uint16_t nb_desc, in eth_igb_rx_queue_setup() argument1734 if (nb_desc % IGB_RXD_ALIGN != 0 || in eth_igb_rx_queue_setup()1735 (nb_desc > E1000_MAX_RING_DESC) || in eth_igb_rx_queue_setup()1736 (nb_desc < E1000_MIN_RING_DESC)) { in eth_igb_rx_queue_setup()[all …]