| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_arcturus.c | 84 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 117 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 140 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 190 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 210 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 238 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 259 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 261 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 275 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() 276 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_hqd_sdma_destroy()
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| H A D | amdgpu_amdkfd_gfx_v10.c | 180 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL, in get_sdma_rlc_reg_offset() 188 mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL in get_sdma_rlc_reg_offset() 192 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 405 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 455 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 475 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 525 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 657 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 659 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 673 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() [all …]
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| H A D | amdgpu_amdkfd_gfx_v10_3.c | 157 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 161 mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 165 mmSDMA2_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 169 mmSDMA3_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 174 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 390 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in hqd_sdma_load_v10_3() 440 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in hqd_sdma_load_v10_3() 460 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in hqd_sdma_dump_v10_3() 510 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in hqd_sdma_is_occupied_v10_3() 579 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in hqd_sdma_destroy_v10_3() [all …]
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| H A D | amdgpu_amdkfd_gfx_v9.c | 207 mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 211 mmSDMA1_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL; in get_sdma_rlc_reg_offset() 216 + queue_id * (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL); in get_sdma_rlc_reg_offset() 414 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 464 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 484 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 534 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 605 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 607 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 621 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() [all …]
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| H A D | amdgpu_amdkfd_gfx_v8.c | 290 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 329 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 349 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 402 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 527 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 529 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 543 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() 544 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_hqd_sdma_destroy()
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| H A D | amdgpu_amdkfd_gfx_v7.c | 304 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_load() 343 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data); in kgd_hqd_sdma_load() 363 for (reg = mmSDMA0_RLC0_RB_CNTL; reg <= mmSDMA0_RLC0_DOORBELL; reg++) in kgd_hqd_sdma_dump() 407 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_is_occupied() 529 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL); in kgd_hqd_sdma_destroy() 531 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp); in kgd_hqd_sdma_destroy() 545 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, in kgd_hqd_sdma_destroy() 546 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) | in kgd_hqd_sdma_destroy()
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| H A D | cikd.h | 563 #define KFD_CIK_SDMA_QUEUE_OFFSET (mmSDMA0_RLC1_RB_CNTL - mmSDMA0_RLC0_RB_CNTL)
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
| H A D | sdma0_4_1_offset.h | 290 #define mmSDMA0_RLC0_RB_CNTL … macro
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| H A D | sdma0_4_0_offset.h | 378 #define mmSDMA0_RLC0_RB_CNTL 0x0140 macro
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| H A D | sdma0_4_2_offset.h | 374 #define mmSDMA0_RLC0_RB_CNTL … macro
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| H A D | sdma0_4_2_2_offset.h | 378 #define mmSDMA0_RLC0_RB_CNTL … macro
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| H A D | oss_2_4_d.h | 214 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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| H A D | oss_3_0_1_d.h | 253 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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| H A D | oss_2_0_d.h | 268 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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| H A D | oss_3_0_d.h | 375 #define mmSDMA0_RLC0_RB_CNTL 0x3500 macro
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_10_1_0_offset.h | 370 #define mmSDMA0_RLC0_RB_CNTL … macro
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| H A D | gc_10_3_0_offset.h | 366 #define mmSDMA0_RLC0_RB_CNTL … macro
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