| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/ |
| H A D | cik_sdma.c | 908 orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET); in cik_enable_sdma_mgls()
911 WREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data); in cik_enable_sdma_mgls()
913 orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET); in cik_enable_sdma_mgls()
916 WREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET, data); in cik_enable_sdma_mgls()
918 orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET); in cik_enable_sdma_mgls()
921 WREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data); in cik_enable_sdma_mgls()
923 orig = data = RREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET); in cik_enable_sdma_mgls()
926 WREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET, data); in cik_enable_sdma_mgls()
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| H A D | sdma_v4_0.c | 95 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_POWER_CNTL, 0x003ff006, 0x0003c000),
141 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_POWER_CNTL, 0xfc3fffff, 0x40000051),
269 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_POWER_CNTL, 0x003fff07, 0x40000051),
1337 def = data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL)); in sdma_v4_1_init_power_gating()
1340 WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), data); in sdma_v4_1_init_power_gating()
1349 def = data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL)); in sdma_v4_1_init_power_gating()
1356 WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), data); in sdma_v4_1_init_power_gating()
2200 def = data = RREG32_SDMA(0, mmSDMA0_POWER_CNTL); in sdma_v4_0_update_medium_grain_light_sleep()
2203 WREG32_SDMA(0, mmSDMA0_POWER_CNTL, data); in sdma_v4_0_update_medium_grain_light_sleep()
2208 def = data = RREG32_SDMA(0, mmSDMA0_POWER_CNTL); in sdma_v4_0_update_medium_grain_light_sleep()
[all …]
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| H A D | sdma_v3_0.c | 151 mmSDMA0_POWER_CNTL, 0x00000800, 0x0003c800,
171 mmSDMA0_POWER_CNTL, 0x00000800, 0x0003c800,
1487 temp = data = RREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i]); in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1491 WREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i], data); in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1495 temp = data = RREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i]); in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1499 WREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i], data); in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1547 data = RREG32(mmSDMA0_POWER_CNTL + sdma_offsets[0]); in sdma_v3_0_get_clockgating_state()
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| H A D | sdma_v5_2.c | 1538 def = data = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL)); in sdma_v5_2_update_medium_grain_light_sleep()
1541 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data); in sdma_v5_2_update_medium_grain_light_sleep()
1545 def = data = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL)); in sdma_v5_2_update_medium_grain_light_sleep()
1548 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data); in sdma_v5_2_update_medium_grain_light_sleep()
1592 data = RREG32_KIQ(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_POWER_CNTL)); in sdma_v5_2_get_clockgating_state()
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| H A D | sdma_v5_0.c | 1544 def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL)); in sdma_v5_0_update_medium_grain_light_sleep()
1547 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data); in sdma_v5_0_update_medium_grain_light_sleep()
1551 def = data = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL)); in sdma_v5_0_update_medium_grain_light_sleep()
1554 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data); in sdma_v5_0_update_medium_grain_light_sleep()
1604 data = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_POWER_CNTL)); in sdma_v5_0_get_clockgating_state()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
| H A D | sdma0_4_1_offset.h | 64 #define mmSDMA0_POWER_CNTL … macro
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| H A D | sdma0_4_0_offset.h | 66 #define mmSDMA0_POWER_CNTL 0x001a macro
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| H A D | sdma0_4_2_offset.h | 66 #define mmSDMA0_POWER_CNTL … macro
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| H A D | sdma0_4_2_2_offset.h | 66 #define mmSDMA0_POWER_CNTL … macro
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| H A D | oss_2_4_d.h | 159 #define mmSDMA0_POWER_CNTL 0x3402 macro
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| H A D | oss_3_0_1_d.h | 156 #define mmSDMA0_POWER_CNTL 0x3402 macro
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| H A D | oss_2_0_d.h | 221 #define mmSDMA0_POWER_CNTL 0x3402 macro
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| H A D | oss_3_0_d.h | 293 #define mmSDMA0_POWER_CNTL 0x3402 macro
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_10_1_0_offset.h | 41 #define mmSDMA0_POWER_CNTL … macro
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| H A D | gc_10_3_0_offset.h | 46 #define mmSDMA0_POWER_CNTL … macro
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