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Searched refs:maindiv (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h21 u32 maindiv; member
59 u32 maindiv; member
/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_gen5.c206 writel(cfg->maindiv, &clock_manager_base->main_pll.maindiv); in cm_basic_init()
431 reg = readl(&clock_manager_base->main_pll.maindiv); in cm_get_l4_sp_clk_hz()