Searched refs:ecc_ctrl (Results 1 – 6 of 6) sorted by relevance
| /OK3568_Linux_fs/u-boot/arch/arm/mach-keystone/ |
| H A D | init.c | 41 u32 ecc_ctrl[KS2_OSR_NUM_RAM_BANKS]; in osr_init() local 63 ecc_ctrl[i] = readl(base + KS2_OSR_ECC_CTRL) ^ in osr_init() 66 writel(ecc_ctrl[i], KS2_MSMC_DATA_BASE + i * 4); in osr_init() 67 writel(ecc_ctrl[i], base + KS2_OSR_ECC_CTRL); in osr_init() 76 writel(ecc_ctrl[i] | in osr_init()
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| /OK3568_Linux_fs/u-boot/drivers/mtd/nand/raw/ |
| H A D | lpc32xx_nand_slc.c | 170 u32 i, dmasrc, ctrl, ecc_ctrl, oob_ctrl, dmadst; in lpc32xx_nand_dma_configure() local 178 ecc_ctrl = 0x5 | in lpc32xx_nand_dma_configure() 253 dmalist_cur_ecc->next_ctrl = ecc_ctrl; in lpc32xx_nand_dma_configure()
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| /OK3568_Linux_fs/kernel/drivers/edac/ |
| H A D | amd64_edac.h | 339 u32 ecc_ctrl; /* DRAM ECC Control reg */ member
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| H A D | pnd2_edac.c | 437 static struct d_cr_ecc_ctrl ecc_ctrl[DNV_NUM_CHANNELS]; variable 493 if (RD_REGP(&ecc_ctrl[i], d_cr_ecc_ctrl, dnv_dports[i]) || in dnv_get_registers() 1101 if (DIMMS_PRESENT(d) && !ecc_ctrl[ch].eccen) { in check_unit()
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| H A D | amd64_edac.c | 859 edac_dbg(1, "UMC%d ECC ctrl: 0x%x\n", i, umc->ecc_ctrl); in __dump_misc_regs_df() 2767 if (pvt->umc[i].ecc_ctrl & BIT(9)) { in determine_ecc_sym_sz() 2770 } else if (pvt->umc[i].ecc_ctrl & BIT(7)) { in determine_ecc_sym_sz() 2808 amd_smn_read(nid, umc_base + UMCCH_ECC_CTRL, &umc->ecc_ctrl); in __read_mc_regs_df()
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| /OK3568_Linux_fs/u-boot/arch/x86/cpu/quark/ |
| H A D | smc.c | 2553 u32 ecc_ctrl; in ecc_enable() local 2573 ecc_ctrl = (DECCCTRL_SBEEN | DECCCTRL_DBEEN | DECCCTRL_ENCBGEN); in ecc_enable() 2574 msg_port_write(MEM_CTLR, DECCCTRL, ecc_ctrl); in ecc_enable()
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