Home
last modified time | relevance | path

Searched refs:ddrccr (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Dscg.h267 u32 ddrccr; /* SCG DDR Clock Control Register */ member
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx7ulp/
H A Dscg.c336 reg = readl(&scg1_regs->ddrccr); in scg_ddr_get_rate()
920 writel(SCG1_DDRCCR_CFG_NUM, &scg1_regs->ddrccr); in scg_a7_ddrclk_init()