Home
last modified time | relevance | path

Searched refs:cntr15clk (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_arria10.h32 u32 cntr15clk; member
/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_arria10.c698 &clock_manager_base->main_pll.cntr15clk); in cm_full_cfg()
971 src_hz /= (readl(&clock_manager_base->main_pll.cntr15clk) & in cm_get_per_vco_clk_hz()
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dsocfpga_arria10_socdk_sdmmc_handoff.dtsi77 900 /* Field: cntr15clk.cnt */