Searched refs:XEL_TSR_XMIT_BUSY_MASK (Results 1 – 2 of 2) sorted by relevance
30 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL macro36 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)389 return !(tmp & XEL_TSR_XMIT_BUSY_MASK); in xemaclite_txbufferavailable()420 if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { in emaclite_send()428 reg |= XEL_TSR_XMIT_BUSY_MASK; in emaclite_send()436 if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { in emaclite_send()445 reg |= XEL_TSR_XMIT_BUSY_MASK; in emaclite_send()
66 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */ macro75 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)330 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | in xemaclite_send_data()345 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | in xemaclite_send_data()363 reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK); in xemaclite_send_data()670 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && in xemaclite_interrupt()681 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && in xemaclite_interrupt()