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Searched refs:VPLL0 (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3308.c80 [VPLL0] = PLL(pll_rk3328, PLL_VPLL0, RK3308_PLL_CON(16),
189 priv->vpll0_hz = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL0], in rk3308_clk_get_pll_rate()
190 priv->cru, VPLL0); in rk3308_clk_get_pll_rate()
269 pll_rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL0], in rk3308_mac_set_clk()
270 priv->cru, VPLL0); in rk3308_mac_set_clk()
947 rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL0], in rk3308_clk_get_rate()
948 priv->cru, VPLL0); in rk3308_clk_get_rate()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3308.h37 VPLL0, enumerator
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3308.c157 pll_set(VPLL0, priv, &rk3308_pll_div); in rkdclk_init()