Searched refs:VCCIO3_5_IOC_BASE (Results 1 – 1 of 1) sorted by relevance
66 #define VCCIO3_5_IOC_BASE 0xfd5fa000 macro912 writel(0x33002200, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO2A_DS_H); in arch_cpu_init()913 writel(0x30332022, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO2B_DS_L); in arch_cpu_init()914 writel(0x00030002, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO2B_DS_H); in arch_cpu_init()917 writel(0x77772222, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO3A_DS_L); in arch_cpu_init()918 writel(0x00700020, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO3A_DS_H); in arch_cpu_init()919 writel(0x00070002, VCCIO3_5_IOC_BASE + IOC_VCCIO3_5_GPIO3C_DS_H); in arch_cpu_init()