Searched refs:UNIPHIER_SD_CLKCTL_DIV8 (Results 1 – 1 of 1) sorted by relevance
72 #define UNIPHIER_SD_CLKCTL_DIV8 BIT(1) /* SDCLK = CLK / 8 */ macro560 val = UNIPHIER_SD_CLKCTL_DIV8; in uniphier_sd_set_clk_rate()