Searched refs:UNIPHIER_SD_CLKCTL_DIV64 (Results 1 – 1 of 1) sorted by relevance
69 #define UNIPHIER_SD_CLKCTL_DIV64 BIT(4) /* SDCLK = CLK / 64 */ macro566 val = UNIPHIER_SD_CLKCTL_DIV64; in uniphier_sd_set_clk_rate()