Searched refs:UNIPHIER_SD_CLKCTL_DIV128 (Results 1 – 1 of 1) sorted by relevance
68 #define UNIPHIER_SD_CLKCTL_DIV128 BIT(5) /* SDCLK = CLK / 128 */ macro568 val = UNIPHIER_SD_CLKCTL_DIV128; in uniphier_sd_set_clk_rate()