Searched refs:UNIPHIER_SD_CLKCTL_DIV1024 (Results 1 – 1 of 1) sorted by relevance
65 #define UNIPHIER_SD_CLKCTL_DIV1024 BIT(16) /* SDCLK = CLK / 1024 */ macro574 val = UNIPHIER_SD_CLKCTL_DIV1024; in uniphier_sd_set_clk_rate()