Searched refs:UNIPHIER_SD_CLKCTL_DIV1 (Results 1 – 1 of 1) sorted by relevance
75 #define UNIPHIER_SD_CLKCTL_DIV1 BIT(10) /* SDCLK = CLK */ macro554 val = UNIPHIER_SD_CLKCTL_DIV1; in uniphier_sd_set_clk_rate()