Searched refs:UART_RSA_BASE (Results 1 – 5 of 5) sorted by relevance
289 #define UART_RSA_BASE (-8) macro291 #define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */298 #define UART_RSA_IER ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register */306 #define UART_RSA_SRR ((UART_RSA_BASE) + 2) /* IN: Status Read Register */317 #define UART_RSA_FRR ((UART_RSA_BASE) + 2) /* OUT: FIFO Reset Register */319 #define UART_RSA_TIVSR ((UART_RSA_BASE) + 3) /* I/O: Timer Interval Value Set Register */321 #define UART_RSA_TCR ((UART_RSA_BASE) + 4) /* OUT: Timer Control Register */
291 #define UART_RSA_BASE (-8) macro293 #define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */300 #define UART_RSA_IER ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register */308 #define UART_RSA_SRR ((UART_RSA_BASE) + 2) /* IN: Status Read Register */319 #define UART_RSA_FRR ((UART_RSA_BASE) + 2) /* OUT: FIFO Reset Register */321 #define UART_RSA_TIVSR ((UART_RSA_BASE) + 3) /* I/O: Timer Interval Value Set Register */323 #define UART_RSA_TCR ((UART_RSA_BASE) + 4) /* OUT: Timer Control Register */
299 #define UART_RSA_BASE (-8) macro301 #define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */308 #define UART_RSA_IER ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register */316 #define UART_RSA_SRR ((UART_RSA_BASE) + 2) /* IN: Status Read Register */327 #define UART_RSA_FRR ((UART_RSA_BASE) + 2) /* OUT: FIFO Reset Register */329 #define UART_RSA_TIVSR ((UART_RSA_BASE) + 3) /* I/O: Timer Interval Value Set Register */331 #define UART_RSA_TCR ((UART_RSA_BASE) + 4) /* OUT: Timer Control Register */
356 unsigned long start = UART_RSA_BASE << up->port.regshift; in serial8250_request_rsa_resource()377 unsigned long offset = UART_RSA_BASE << up->port.regshift; in serial8250_release_rsa_resource()