Searched refs:SYSMGR_SDMMC_CTRL_SET (Results 1 – 2 of 2) sorted by relevance
23 #define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \ macro
157 hs_timing = SYSMGR_SDMMC_CTRL_SET(clk_phase[0], clk_phase[1]); in socfpga_clk_prepare()