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Searched refs:SIUL2_MSCRn (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/u-boot/board/freescale/s32v234evb/
H A Ds32v234evb.c55 writel(SIUL2_UART_TXD, SIUL2_MSCRn(SIUL2_UART0_TXD_PAD)); in setup_iomux_uart()
58 writel(SIUL2_UART_MSCR_RXD, SIUL2_MSCRn(SIUL2_UART0_MSCR_RXD_PAD)); in setup_iomux_uart()
96 writel(SIUL2_USDHC_PAD_CTRL_CLK, SIUL2_MSCRn(150)); in board_mmc_init()
97 writel(0x3, SIUL2_MSCRn(902)); in board_mmc_init()
100 writel(SIUL2_USDHC_PAD_CTRL_CMD, SIUL2_MSCRn(151)); in board_mmc_init()
101 writel(0x3, SIUL2_MSCRn(901)); in board_mmc_init()
104 writel(SIUL2_USDHC_PAD_CTRL_DAT0_3, SIUL2_MSCRn(152)); in board_mmc_init()
105 writel(0x3, SIUL2_MSCRn(903)); in board_mmc_init()
108 writel(SIUL2_USDHC_PAD_CTRL_DAT0_3, SIUL2_MSCRn(153)); in board_mmc_init()
109 writel(0x3, SIUL2_MSCRn(904)); in board_mmc_init()
[all …]
H A Dlpddr2.c21 mscr_offset_ck0 = SIUL2_MSCRn(_DDR0_CKE0); in lpddr2_config_iomux()
22 writel(LPDDR2_CLK0_PAD, SIUL2_MSCRn(_DDR0_CLK0)); in lpddr2_config_iomux()
24 writel(LPDDR2_CKEn_PAD, SIUL2_MSCRn(_DDR0_CKE0)); in lpddr2_config_iomux()
25 writel(LPDDR2_CKEn_PAD, SIUL2_MSCRn(_DDR0_CKE1)); in lpddr2_config_iomux()
27 writel(LPDDR2_CS_Bn_PAD, SIUL2_MSCRn(_DDR0_CS_B0)); in lpddr2_config_iomux()
28 writel(LPDDR2_CS_Bn_PAD, SIUL2_MSCRn(_DDR0_CS_B1)); in lpddr2_config_iomux()
31 writel(LPDDR2_DMn_PAD, SIUL2_MSCRn(i)); in lpddr2_config_iomux()
34 writel(LPDDR2_DQSn_PAD, SIUL2_MSCRn(i)); in lpddr2_config_iomux()
37 writel(LPDDR2_An_PAD, SIUL2_MSCRn(i)); in lpddr2_config_iomux()
40 writel(LPDDR2_Dn_PAD, SIUL2_MSCRn(i)); in lpddr2_config_iomux()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-s32v234/
H A Dsiul.h30 #define SIUL2_MSCRn(i) (SIUL2_MSCR_BASE + 4 * (i)) macro