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Searched refs:R_0x1e8c (Results 1 – 24 of 24) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723cs/hal/phydm/
H A Dphydm_psd.c51 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
385 odm_set_bb_reg(dm, R_0x1e8c, BIT(12) | BIT(11), hw_avg_time); in phydm_psd_para_setting()
386 odm_set_bb_reg(dm, R_0x1e8c, BIT(14) | BIT(13), in phydm_psd_para_setting()
388 odm_set_bb_reg(dm, R_0x1e8c, BIT(18) | BIT(17), ant_sel); in phydm_psd_para_setting()
392 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
393 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
401 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
404 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
405 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
443 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
[all …]
H A Dphydm_regtable.h310 #define R_0x1e8c 0x1e8c macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8723ds/hal/phydm/
H A Dphydm_psd.c51 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
385 odm_set_bb_reg(dm, R_0x1e8c, BIT(12) | BIT(11), hw_avg_time); in phydm_psd_para_setting()
386 odm_set_bb_reg(dm, R_0x1e8c, BIT(14) | BIT(13), in phydm_psd_para_setting()
388 odm_set_bb_reg(dm, R_0x1e8c, BIT(18) | BIT(17), ant_sel); in phydm_psd_para_setting()
392 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
393 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
401 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
404 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
405 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
443 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
[all …]
H A Dphydm_regtable.h318 #define R_0x1e8c 0x1e8c macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/phydm/
H A Dphydm_psd.c52 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
386 odm_set_bb_reg(dm, R_0x1e8c, BIT(12) | BIT(11), hw_avg_time); in phydm_psd_para_setting()
387 odm_set_bb_reg(dm, R_0x1e8c, BIT(14) | BIT(13), in phydm_psd_para_setting()
389 odm_set_bb_reg(dm, R_0x1e8c, BIT(18) | BIT(17), ant_sel); in phydm_psd_para_setting()
393 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
394 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
402 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
405 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
406 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
444 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
[all …]
H A Dphydm_regtable.h310 #define R_0x1e8c 0x1e8c macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/phydm/
H A Dphydm_psd.c51 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
385 odm_set_bb_reg(dm, R_0x1e8c, BIT(12) | BIT(11), hw_avg_time); in phydm_psd_para_setting()
386 odm_set_bb_reg(dm, R_0x1e8c, BIT(14) | BIT(13), in phydm_psd_para_setting()
388 odm_set_bb_reg(dm, R_0x1e8c, BIT(18) | BIT(17), ant_sel); in phydm_psd_para_setting()
392 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
393 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
401 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
404 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
405 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
443 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
[all …]
H A Dphydm_regtable.h320 #define R_0x1e8c 0x1e8c macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/phydm/
H A Dphydm_psd.c51 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
385 odm_set_bb_reg(dm, R_0x1e8c, BIT(12) | BIT(11), hw_avg_time); in phydm_psd_para_setting()
386 odm_set_bb_reg(dm, R_0x1e8c, BIT(14) | BIT(13), in phydm_psd_para_setting()
388 odm_set_bb_reg(dm, R_0x1e8c, BIT(18) | BIT(17), ant_sel); in phydm_psd_para_setting()
392 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
393 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
401 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
404 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
405 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
443 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
[all …]
H A Dphydm_regtable.h319 #define R_0x1e8c 0x1e8c macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189fs/hal/phydm/
H A Dphydm_psd.c41 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
310 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
311 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
319 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
322 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
323 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
356 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
H A Dphydm_regtable.h256 #define R_0x1e8c 0x1e8c macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188fu/hal/phydm/
H A Dphydm_psd.c41 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
310 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
311 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
319 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
322 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
323 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
356 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
H A Dphydm_regtable.h256 #define R_0x1e8c 0x1e8c macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/phydm/
H A Dphydm_psd.c41 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
310 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
311 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
319 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
322 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
323 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
356 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
H A Dphydm_regtable.h256 #define R_0x1e8c 0x1e8c macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/phydm/
H A Dphydm_psd.c40 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
317 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
318 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
326 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
329 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
330 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
363 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
H A Dphydm_regtable.h259 #define R_0x1e8c 0x1e8c macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/hal/phydm/
H A Dphydm_psd.c41 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
329 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
330 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
338 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
341 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
342 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
378 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
H A Dphydm_regtable.h289 #define R_0x1e8c 0x1e8c macro
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8189fs/hal/phydm/
H A Dphydm_psd.c41 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
329 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
330 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
338 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
341 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
342 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
378 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
H A Dphydm_regtable.h289 #define R_0x1e8c 0x1e8c macro
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723ds/hal/phydm/
H A Dphydm_psd.c42 odm_set_bb_reg(dm, R_0x1e8c, 0x3ff, psd_tone_idx & 0x3ff); in phydm_get_psd_data()
330 odm_set_bb_reg(dm, R_0x1e8c, BIT(11) | BIT(10), i_q_setting); in phydm_psd_para_setting()
331 odm_set_bb_reg(dm, R_0x1e8c, BIT(13) | BIT(12), hw_avg_time); in phydm_psd_para_setting()
339 odm_set_bb_reg(dm, R_0x1e8c, BIT(15) | BIT(14), in phydm_psd_para_setting()
342 odm_set_bb_reg(dm, R_0x1e8c, BIT(17) | BIT(16), ant_sel); in phydm_psd_para_setting()
343 odm_set_bb_reg(dm, R_0x1e8c, BIT(23) | BIT(22), psd_input); in phydm_psd_para_setting()
379 dm_psd_table->psd_reg = R_0x1e8c; in phydm_psd_init()
H A Dphydm_regtable.h265 #define R_0x1e8c 0x1e8c macro