Searched refs:RGA_IOMMU_BASE (Results 1 – 1 of 1) sorted by relevance
8 #define RGA_IOMMU_BASE 0xf00 macro9 #define RGA_IOMMU_DTE_ADDR (RGA_IOMMU_BASE + 0x00) /* Directory table address */10 #define RGA_IOMMU_STATUS (RGA_IOMMU_BASE + 0x04)11 #define RGA_IOMMU_COMMAND (RGA_IOMMU_BASE + 0x08)12 #define RGA_IOMMU_PAGE_FAULT_ADDR (RGA_IOMMU_BASE + 0x0C) /* IOVA of last page fault */13 #define RGA_IOMMU_ZAP_ONE_LINE (RGA_IOMMU_BASE + 0x10) /* Shootdown one IOTLB entry */14 #define RGA_IOMMU_INT_RAWSTAT (RGA_IOMMU_BASE + 0x14) /* IRQ status ignoring mask */15 #define RGA_IOMMU_INT_CLEAR (RGA_IOMMU_BASE + 0x18) /* Acknowledge and re-arm irq */16 #define RGA_IOMMU_INT_MASK (RGA_IOMMU_BASE + 0x1C) /* IRQ enable */17 #define RGA_IOMMU_INT_STATUS (RGA_IOMMU_BASE + 0x20) /* IRQ status after masking */[all …]