| /OK3568_Linux_fs/kernel/sound/soc/codecs/aw87xxx/ |
| H A D | aw87xxx_pid_59_3x9_reg.h | 52 #define REG_WR_ACCESS (1 << 1) macro
56 [AW87XXX_PID_59_3X9_REG_SYSCTRL] = (REG_RD_ACCESS | REG_WR_ACCESS),
57 [AW87XXX_PID_59_3X9_REG_MDCRTL] = (REG_RD_ACCESS | REG_WR_ACCESS),
58 [AW87XXX_PID_59_3X9_REG_CPOVP] = (REG_RD_ACCESS | REG_WR_ACCESS),
59 [AW87XXX_PID_59_3X9_REG_CPP] = (REG_RD_ACCESS | REG_WR_ACCESS),
60 [AW87XXX_PID_59_3X9_REG_PAG] = (REG_RD_ACCESS | REG_WR_ACCESS),
61 [AW87XXX_PID_59_3X9_REG_AGC3PO] = (REG_RD_ACCESS | REG_WR_ACCESS),
62 [AW87XXX_PID_59_3X9_REG_AGC3PA] = (REG_RD_ACCESS | REG_WR_ACCESS),
63 [AW87XXX_PID_59_3X9_REG_AGC2PO] = (REG_RD_ACCESS | REG_WR_ACCESS),
64 [AW87XXX_PID_59_3X9_REG_AGC2PA] = (REG_RD_ACCESS | REG_WR_ACCESS),
[all …]
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| H A D | aw87xxx_pid_59_5x9_reg.h | 53 #define REG_WR_ACCESS (1 << 1) macro
57 [AW87XXX_PID_59_5X9_REG_SYSCTRL] = (REG_RD_ACCESS | REG_WR_ACCESS),
58 [AW87XXX_PID_59_5X9_REG_BATSAFE] = (REG_RD_ACCESS | REG_WR_ACCESS),
59 [AW87XXX_PID_59_5X9_REG_BSTOVR] = (REG_RD_ACCESS | REG_WR_ACCESS),
60 [AW87XXX_PID_59_5X9_REG_BSTVPR] = (REG_RD_ACCESS | REG_WR_ACCESS),
61 [AW87XXX_PID_59_5X9_REG_PAGR] = (REG_RD_ACCESS | REG_WR_ACCESS),
62 [AW87XXX_PID_59_5X9_REG_PAGC3OPR] = (REG_RD_ACCESS | REG_WR_ACCESS),
63 [AW87XXX_PID_59_5X9_REG_PAGC3PR] = (REG_RD_ACCESS | REG_WR_ACCESS),
64 [AW87XXX_PID_59_5X9_REG_PAGC2OPR] = (REG_RD_ACCESS | REG_WR_ACCESS),
65 [AW87XXX_PID_59_5X9_REG_PAGC2PR] = (REG_RD_ACCESS | REG_WR_ACCESS),
[all …]
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| H A D | aw87xxx_pid_39_reg.h | 36 #define REG_WR_ACCESS (1 << 1) macro
40 [AW87XXX_PID_39_REG_SYSCTRL] = (REG_RD_ACCESS | REG_WR_ACCESS),
41 [AW87XXX_PID_39_REG_MODECTRL] = (REG_RD_ACCESS | REG_WR_ACCESS),
42 [AW87XXX_PID_39_REG_CPOVP] = (REG_RD_ACCESS | REG_WR_ACCESS),
43 [AW87XXX_PID_39_REG_CPP] = (REG_RD_ACCESS | REG_WR_ACCESS),
44 [AW87XXX_PID_39_REG_GAIN] = (REG_RD_ACCESS | REG_WR_ACCESS),
45 [AW87XXX_PID_39_REG_AGC3_PO] = (REG_RD_ACCESS | REG_WR_ACCESS),
46 [AW87XXX_PID_39_REG_AGC3] = (REG_RD_ACCESS | REG_WR_ACCESS),
47 [AW87XXX_PID_39_REG_AGC2_PO] = (REG_RD_ACCESS | REG_WR_ACCESS),
48 [AW87XXX_PID_39_REG_AGC2] = (REG_RD_ACCESS | REG_WR_ACCESS),
[all …]
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| H A D | aw87xxx_pid_9b_reg.h | 32 #define REG_WR_ACCESS (1 << 1) macro
36 [AW87XXX_PID_9B_SYSCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
37 [AW87XXX_PID_9B_BATSAFE_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
38 [AW87XXX_PID_9B_BOV_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
39 [AW87XXX_PID_9B_BP_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
40 [AW87XXX_PID_9B_GAIN_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
41 [AW87XXX_PID_9B_AGC3_PO_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
42 [AW87XXX_PID_9B_AGC3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
43 [AW87XXX_PID_9B_AGC2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
44 [AW87XXX_PID_9B_AGC1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
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| H A D | aw87xxx_pid_76_reg.h | 53 #define REG_WR_ACCESS (1 << 1) macro
57 [AW87XXX_PID_76_SYSCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
58 [AW87XXX_PID_76_MDCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
59 [AW87XXX_PID_76_CPOVP_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
60 [AW87XXX_PID_76_CPP_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
61 [AW87XXX_PID_76_PAG_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
62 [AW87XXX_PID_76_AGC3P_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
63 [AW87XXX_PID_76_AGC3PA_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
64 [AW87XXX_PID_76_AGC2P_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
65 [AW87XXX_PID_76_AGC2PA_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
[all …]
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| H A D | aw87xxx_pid_5a_reg.h | 68 #define REG_WR_ACCESS (1 << 1) macro
72 [AW87XXX_PID_5A_REG_SYSCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
73 [AW87XXX_PID_5A_REG_BATSAFE_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
74 [AW87XXX_PID_5A_REG_BSTOVR_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
75 [AW87XXX_PID_5A_REG_BSTCPR1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
76 [AW87XXX_PID_5A_REG_BSTCPR2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
77 [AW87XXX_PID_5A_REG_PAGR_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
78 [AW87XXX_PID_5A_REG_PAGC3OPR_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
79 [AW87XXX_PID_5A_REG_PAGC3PR_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
80 [AW87XXX_PID_5A_REG_PAGC2OPR_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
[all …]
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| H A D | aw87xxx_pid_18_reg.h | 43 #define REG_WR_ACCESS (1 << 1) macro
49 [AW87XXX_PID_18_SYSCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
50 [AW87XXX_PID_18_CPOC_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
51 [AW87XXX_PID_18_CLASSD_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
52 [AW87XXX_PID_18_MADPVTH_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
53 [AW87XXX_PID_18_A3PARAM_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
54 [AW87XXX_PID_18_A3A2PO_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
55 [AW87XXX_PID_18_A2PARAM_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
56 [AW87XXX_PID_18_A1PARAM_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
57 [AW87XXX_PID_18_POPCLK_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
[all …]
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| /OK3568_Linux_fs/kernel/sound/soc/codecs/aw883xx/ |
| H A D | aw_pid_2049_reg.h | 102 #define REG_WR_ACCESS (1 << 1) macro
108 [AW_PID_2049_SYSINTM_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
109 [AW_PID_2049_SYSCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
110 [AW_PID_2049_SYSCTRL2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
111 [AW_PID_2049_I2SCTRL_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
112 [AW_PID_2049_I2SCFG1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
113 [AW_PID_2049_I2SCFG2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
114 [AW_PID_2049_HAGCCFG1_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
115 [AW_PID_2049_HAGCCFG2_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
116 [AW_PID_2049_HAGCCFG3_REG] = (REG_RD_ACCESS | REG_WR_ACCESS),
[all …]
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| H A D | aw_init.c | 239 if (aw_pid_2049_reg_access[reg] & REG_WR_ACCESS) in aw_pid_2049_check_wr_access()
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