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Searched refs:REG_TRAINING_DEBUG_3_MASK (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_init.c344 reg &= ~(REG_TRAINING_DEBUG_3_MASK); in ddr3_init()
346 reg &= ~(REG_TRAINING_DEBUG_3_MASK << REG_TRAINING_DEBUG_3_OFFS); in ddr3_init()
348 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (3 * REG_TRAINING_DEBUG_3_OFFS)); in ddr3_init()
350 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (4 * REG_TRAINING_DEBUG_3_OFFS)); in ddr3_init()
352 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (5 * REG_TRAINING_DEBUG_3_OFFS)); in ddr3_init()
H A Dddr3_hws_hw_training_def.h221 #define REG_TRAINING_DEBUG_3_MASK 0x7 macro
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_init.c514 reg &= ~(REG_TRAINING_DEBUG_3_MASK); in ddr3_init_main()
516 reg &= ~(REG_TRAINING_DEBUG_3_MASK << REG_TRAINING_DEBUG_3_OFFS); in ddr3_init_main()
518 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (3 * REG_TRAINING_DEBUG_3_OFFS)); in ddr3_init_main()
520 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (4 * REG_TRAINING_DEBUG_3_OFFS)); in ddr3_init_main()
522 reg &= ~(REG_TRAINING_DEBUG_3_MASK << (5 * REG_TRAINING_DEBUG_3_OFFS)); in ddr3_init_main()
H A Dddr3_axp.h249 #define REG_TRAINING_DEBUG_3_MASK 0x7 macro
H A Dddr3_read_leveling.c664 add &= REG_TRAINING_DEBUG_3_MASK; in ddr3_read_leveling_single_cs_rl_mode()
720 add &= REG_TRAINING_DEBUG_3_MASK; in ddr3_read_leveling_single_cs_rl_mode()