Home
last modified time | relevance | path

Searched refs:REG_PHY_PHASE_OFFS (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_write_leveling.c119 (reg >> REG_PHY_PHASE_OFFS) & in ddr3_write_leveling_hw()
439 (reg >> REG_PHY_PHASE_OFFS) & in ddr3_wl_supplement()
542 (reg >> REG_PHY_PHASE_OFFS) & in ddr3_write_leveling_hw_reg_dimm()
H A Dddr3_axp.h312 #define REG_PHY_PHASE_OFFS 8 macro
H A Dddr3_hw_training.c558 reg |= (phase << REG_PHY_PHASE_OFFS) | delay; in ddr3_write_pup_reg()
H A Dddr3_read_leveling.c109 phase = (reg >> REG_PHY_PHASE_OFFS) & in ddr3_read_leveling_hw()
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_hws_hw_training_def.h286 #define REG_PHY_PHASE_OFFS 8 macro