Searched refs:REG_DRAM_TRAINING_2_FIFO_RST_OFFS (Results 1 – 6 of 6) sorted by relevance
300 (1 << REG_DRAM_TRAINING_2_FIFO_RST_OFFS); in ddr3_read_leveling_sw()306 (1 << REG_DRAM_TRAINING_2_FIFO_RST_OFFS); in ddr3_read_leveling_sw()447 (1 << REG_DRAM_TRAINING_2_FIFO_RST_OFFS); in ddr3_read_leveling_single_cs_rl_mode()453 (1 << REG_DRAM_TRAINING_2_FIFO_RST_OFFS); in ddr3_read_leveling_single_cs_rl_mode()801 (1 << REG_DRAM_TRAINING_2_FIFO_RST_OFFS); in ddr3_read_leveling_single_cs_window_mode()807 (1 << REG_DRAM_TRAINING_2_FIFO_RST_OFFS); in ddr3_read_leveling_single_cs_window_mode()
650 reg |= ((1 << REG_DRAM_TRAINING_2_FIFO_RST_OFFS) + in ddr3_reset_phy_read_fifo()659 (1 << REG_DRAM_TRAINING_2_FIFO_RST_OFFS); in ddr3_reset_phy_read_fifo()
234 #define REG_DRAM_TRAINING_2_FIFO_RST_OFFS 4 macro
681 reg |= ((1 << REG_DRAM_TRAINING_2_FIFO_RST_OFFS) in ddr3_pbs_rx()689 & (1 << REG_DRAM_TRAINING_2_FIFO_RST_OFFS); in ddr3_pbs_rx()
931 reg |= ((1 << REG_DRAM_TRAINING_2_FIFO_RST_OFFS) + in ddr3_training_suspend_resume()
206 #define REG_DRAM_TRAINING_2_FIFO_RST_OFFS 4 macro