Searched refs:REG_A6XX_CP_SQE_INSTR_BASE_LO (Results 1 – 2 of 2) sorted by relevance
676 gpu_write64(gpu, REG_A6XX_CP_SQE_INSTR_BASE_LO, in a6xx_ucode_init()
1010 #define REG_A6XX_CP_SQE_INSTR_BASE_LO 0x00000830 macro