Searched refs:PORT_LINK_MODE_2_LANES (Results 1 – 5 of 5) sorted by relevance
61 #define PORT_LINK_MODE_2_LANES (0x3 << 16) macro264 val |= PORT_LINK_MODE_2_LANES; in pcie_link_set_lanes()
51 #define PORT_LINK_MODE_2_LANES PORT_LINK_MODE(0x3) macro
624 val |= PORT_LINK_MODE_2_LANES; in dw_pcie_setup()
487 val |= PORT_LINK_MODE_2_LANES; in rockchip_pcie_resize_bar()
984 val |= PORT_LINK_MODE_2_LANES; in rk_pcie_ep_setup()