Searched refs:PORT_LINK_MODE_1_LANES (Results 1 – 5 of 5) sorted by relevance
60 #define PORT_LINK_MODE_1_LANES (0x1 << 16) macro261 val |= PORT_LINK_MODE_1_LANES; in pcie_link_set_lanes()
50 #define PORT_LINK_MODE_1_LANES PORT_LINK_MODE(0x1) macro
621 val |= PORT_LINK_MODE_1_LANES; in dw_pcie_setup()
484 val |= PORT_LINK_MODE_1_LANES; in rockchip_pcie_resize_bar()
981 val |= PORT_LINK_MODE_1_LANES; in rk_pcie_ep_setup()